cad/iverilog/Makefile:	$NetBSD: Makefile,v 1.1 2016/10/08 23:01:45 kamil Exp $
cad/iverilog/PLIST:	$NetBSD: PLIST,v 1.1 2016/10/08 23:01:45 kamil Exp $
cad/iverilog/buildlink3.mk:	$NetBSD: buildlink3.mk,v 1.2 2018/01/07 13:03:56 rillig Exp $
cad/iverilog/distinfo:	$NetBSD: distinfo,v 1.7 2021/10/26 10:04:12 nia Exp $
cad/iverilog/patches/patch-Makefile.in:	$NetBSD: patch-Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
cad/iverilog/patches/patch-aa:	$NetBSD: patch-aa,v 1.1 2016/10/08 23:01:45 kamil Exp $
cad/iverilog/patches/patch-cadpli_Makefile.in:	$NetBSD: patch-cadpli_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
cad/iverilog/patches/patch-tgt-pcb_Makefile.in:	$NetBSD: patch-tgt-pcb_Makefile.in,v 1.2 2020/09/27 13:48:21 mef Exp $
cad/iverilog/patches/patch-vhdlpp_Makefile.in:	$NetBSD: patch-vhdlpp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
cad/iverilog/patches/patch-vvp_Makefile.in:	$NetBSD: patch-vvp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
